Home > Program > Keynote Speakers
November 4, 2014, Tues.
Flash Storage Innovations Reshape Cloud Data Centers
Duckhyun Chang
Senior Vice President
Samsung Electronics Co. Ltd., Korea
Biography
Dr. Duck-Hyun Chang was appointed as the Senior Vice President of Solution Product & Development in December of 2013 since he joined Samsung in 2002. After working in Mentor Graphics and Motorola Semiconductor, he served as leader of High Speed Interface Core Development and Storage Controller Design in System LSI Division before moving to Memory Division in 2009. He received his B.S. in Electronic Engineering from Seoul National University in 1986 and Ph.D. in Electrical Engineering from University of Florida in 1997.
Abstract
The demand for quickly storing and retrieving a large amount of data is skyrocketing. Traditional rotating media (hard drives) have failed to offer adequate I/O capabilities under energy and space constraints. Inevitably, flash memory solid-state drives are rapidly replacing hard drives in modern cloud data centers.
In this keynote speech, he will first explain why this trend will accelerate in the future with continued innovations in the flash memory technology. Furthermore, he will discuss advances in today's flash memory solutions, including sophisticated SoC designs, complex media management software, and robust system design techniques.
Finally, he will touch upon "in-storage computing", a new big data processing paradigm where data are processed within the solid-state drive, for improved energy consumption and performance of the overall system.
Managing the Challenges of Embedded Vision Processing - VISIE Vision Processor Architecture
Wei-Jin Dai
CEO and President
Vivante Corporation, USA
Biography
Wei-Jin has 30 years of experience managing both business and product development. Vivante Corporation, a leader in multi-core GPU, OpenCLTM, CPC Composition Engine and Vector Graphics IP solutions, provide the highest performance and lowest power silicon characteristics across a range of KhronosTM Group API conformant standards based on the Vega architecture. Previously Corporate Vice President at Cadence Design Systems, Wei-Jin has also driven the success of multiple startup companies, and he co-founded Silicon Perspective Corporation. He has also held engineering and management positions at Hewlett Packard and Lucent Bell Labs. Wei-Jin holds M.S. and B.S. degrees in Electrical Engineering and Computer Science from the University of California, Berkeley.
Abstract
Embedded VISION is at a tipping point where widespread adoption of devices that “see and understand” the surrounding physical world will change many industries and applications. Vivante has been working with leading industry partners to deliver high performance, real-time, intelligent vision processing in mobile power budgets for smartphones, automotive ADAS (Advanced Driver Assistance System), and security/surveillance.
This keynote will highlight exciting innovations and disruptive technologies that enable GPU vision in Vivante GC7000 VX Series GPUs. GC7000 VX is the industry’s first GPU product line that enables photorealistic 3D rendering and embedded vision acceleration on the same processing core. This innovation is achieved through Vivante’s latest Dynamic VLIW vision instruction set and enhanced shader extensions that achieve single cycle efficiency for most Khronos® OpenVX™ (Vision Acceleration) API instructions, multi-threaded unified cache system, Stream Interface and fine-grained power control to keep power consumption and thermals at mobile levels for real time vision processing. Vision use cases highlighted in the presentation include examples of collaboration with Freescale/Automotive OEMs, and partners in the security market.
Designing Change – Leveraging Innovation and Collaboration
Joachim Kunkel
Senior Vice President and General Manager Solutions Group,
Synopsys Inc., Germany
Biography
Joachim Kunkel joined Synopsys in 1994 and is currently senior vice president and general manager of the Solutions Group. In that capacity, he manages the business unit responsible for Synopsys DesignWare intellectual property (IP), FPGA implementation tools, and prototyping solutions. Before coming to Synopsys, Mr. Kunkel was co-founder of CADIS GmbH in Aachen, Germany. There, he served as managing director and performed myriad duties in engineering, sales and marketing. Mr. Kunkel holds an MSEE degree, the Dipl.-Ing. der Nachrichtentechnik, from the Aachen University of Technology.
Abstract
In the semiconductor design community, the word "change" is, to say the least, an understatement. From a dizzying array of emerging "smart" niche end-products to major market trend shifts to ecosystem reconfigurations at every level, the world around us is changing at an unprecedented pace. The demand on designers to innovate ever faster is driving everything from increased IP usage to prototyping and deeper ecosystem collaboration. In his presentation, Joachim will provide an overview of many years of investment and innovation efforts, resulting in an exciting sweep of major new design productivity advancements in our design and verification platforms.
November 5, 2014, Wed
Is the Time-domain circuit a new paradigm for Analog? - possibility and limit of the time-domain approach -
Kunihiro Asada
Professor
VLSI Design and Education Center,
The University of Tokyo, Japan
Biography
Kunihiro Asada received the B. S., M. S., and Ph.D. from University of Tokyo in 1975, 1977, and 1980, respectively. In 1980 he joined the Faculty of Engineering, University of Tokyo. From 1985 to 1986 he stayed at Edinburgh University as a visiting scholar. From 1990 to 1992 he served as the Editor of IEICE Transactions on Electronics. In 1996 he established VDEC in University of Tokyo. He served as the Chair of IEEE/SSCS Japan Chapter in 2001-2002 and the Chair of IEEE Japan Chapter Operation Committee in 2007-2008. He is currently professor, director of VDEC. His research interest is design and evaluation of integrated systems and component devices. He is a member of IEEE, IEICE and IEEJ.
Abstract
One ofserious issues inthe conventional analog circuits for advanced CMOS technologies is degradation of dynamic range due to lower supply voltage. It is a good contrast with time-domain circuits, wheresharper edge of voltage transition results in lower timing jitterwith improved dynamic range. So,many researchers have proposed time-domain circuits as replacements of voltage domain circuits, such as TDAs(time difference amplifier), TDCs(time-to-digital-converter),PLLs and so on. However, it is not yet proved systematically, whether time-domain is really advantageous over voltage-domain in future CMOS technologies.
In this presentation, after discussing similarity and dissimilarity between voltage-domain circuits and time-domain circuits, a comparison in terms of dynamic range will be introduced for advanced CMOS technologies, by means of numerical simulation and theoretical analysis. It will clarify conditions for time-domain circuits to be advantageous over voltage domain. It will also show that there is no fundamental difference between voltage-domain and time-domain in specific conditions. Finally, some of our recent results of time-domain circuits will be introduced as concrete examples of time-domain circuits.
Keywords - dynamic range, voltage-domain circuit, time-domain circuit, TDA, TDC, PW-PLL, CDR
Modeling, Design, and EDA Research for Stacked-Die 3D IC at GTCAD Lab
Sung-Kyu Lim
Dan Fielder Professor,
School of Electrical and Computer Engineering,
Georgia Institute of technology, USA
Biography
Sung Kyu Lim holds the Dan Fielder Professorship at the School of Electrical and Computer Engineering, Georgia Institute of Technology. He received the Ph.D. degree from UCLA in 2000. His research focus is on the architecture, design, test, and EDA solutions for 3D ICs. His research on 3D IC reliability is featured as a Research Highlight in the Communication of the ACM in 2014.
Dr. Lim received the NSF CAREER Award in 2006. Some of his recent Best Paper Award nominations include DAC (2011, 2012, 2014), ISPD (2014), and ISLPED (2012). He is currently an Associate Editor of the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD).
Abstract
This talk presents an overview of stacked-die 3D IC research at the Georgia Tech Computer-Aided Design (GTCAD) laboratory. First, we present commercial-grade RTL-to-GDSII design and analysis tools for 3D ICs built with (1) through-silicon-via (TSV) and (2) monolithic inter-tier via (MIV). Second, we build large-scale 3D IC designs using the tools and discuss their power, performance, area, reliability (PPAR) tradeoffs.
Our designs are based on open source and foundry PDKs at 130nm, 45nm, and 28nm. We also study PPAR tradeoffs among various die stacking options including face-to-face, face-to-back, and monolithic integration. Lastly, we present our 2-tier test chip that features 64 general-purpose cores and SRAM presented at ISSCC 2012. This is arguably the first general-purpose many-core 3D processor ever developed in academia and fully tested using real applications.
The Next PC: Personal Care Enabled by Internet of Medical Things
Liang-Gee Chen
Professor
National Taiwan University, Taiwan
Biography
Prof. Liang-Gee Chen received the B.S., M.S., and Ph.D. degrees in electrical engineering from National Cheng Kung University, Tainan, Taiwan, R.O.C. in 1979, 1981, and 1986, respectively. In 1988, he joined the Department of Electrical Engineering, National Taiwan University. Currently, he serves as the Chair Professor and received the National Professorship of Taiwan. He is the IEEE Fellow from 2001. His research interests include DSP architecture design, video processor design, and video coding systems. He has over 420 publications and 15 US patents. He has conducted more than 100 technology transfers and helped two start-ups IPO successfully.
Dr. Chen has served as Editorial Board for many IEEE Transactions in VLSI, Video Technology and Circuits and Systems. He also have been invited as the Chair of technical program committee for 2009 IEEE ICASSP and ISCAS 2012. In 2011, he received the Best paper award of IEEE CICC, Custom Integrated Circuits Conference.
Dr. Chen is also an enthusiastic entrepreneur. He is the founder of Taiwan IC design Society, CIC (Chip Implementation Center), NTU SOC center and Graduate Institute of Electronics Engineering. From 2007, he established the Creativity and Entrepreneurship Program at National Taiwan University. The program built the curriculum of innovation, entrepreneurship and start-up. It changes the culture of NTU students and become one of the most welcome program at NTU.
Abstract
It is widely accepted that preventive care armed with ICT technologies will play an important role in increasing the quality of healthcare and decreasing the medical costs. However, very few evidences have been reported to prove this common belief. We have established a telehealth center at National Taiwan University Hospital to safe-guard the patients at home using internet of the things (IOT) technologies. It is found that the mean number of monthly emergency department visits, the length of hospitalization, intensive care unit admissions and all medical costs are much reduced for the patients in the telehealth group. In addition to traditional vital sign medical devices, biomedical SoCs for virus/DNA/protein detection, ECG/neural signal processing, drug delivery, nerve stimulating, body cruise, and silicon brain have also been developed in support of the telehealth center. We believe that the advance of these new biomedical SoCs combined with the IOT technologies will open up a new PC (Personal Care) era for the welfare of the whole human being.
 

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